K4G323222M-QCSLASHL70中文资料三星数据手册PDF规格书

FEATURES

• 3.3V power supply

• LVTTL compatible with multiplexed address

• Dual bank operation

• MRS cycle with address key programs

-. CAS Latency (2, 3)

-. Burst Length (1, 2, 4, 8 & full page)

-. Burst Type (Sequential & Interleave)

• All inputs are sampled at the positive going edge of the

system clock

• Burst Read Single-bit Write operation

• DQM 0-3 for byte masking

• Auto & self refresh

• 32ms refresh period (2K cycle)

• 100 Pin PQFP, TQFP (14 x 20 mm)

Graphics Features

• SMRS cycle.

-. Load mask register

-. Load color register

• Write Per Bit(Old Mask)

• Block Write(8 Columns)

GENERAL DESCRIPTION

The K4G323222M is 33,554,432 bits synchronous high data

rate Dynamic RAM organized as 2 x 524,288 words by 32 bits,

fabricated with SAMSUNG¢s high performance CMOS technology.

Synchronous design allows precise cycle control with the

use of system clock. I/O transactions are possible on every

clock cycle. Range of operating frequencies, programmable

burst length, and programmable latencies allows the same

device to be useful for a variety of high bandwidth, high performance

memory system applications.

Write per bit and 8 columns block write improves performance in

graphics systems.