JM38510SLASH34102B2A.A中文资料德州仪器数据手册PDF规格书

Package Options Include Plastic

Small-Outline Packages, Ceramic Chip

Carriers, and Standard Plastic and Ceramic

300-mil DIPs

description

These devices contain two independent J-K

positive-edge-triggered flip-flops. A low level at

the preset (PRE) or clear (CLR) inputs sets or

resets the outputs regardless of the levels of the

other inputs. When PRE and CLR are inactive

(high), data at the J and K input meeting the

setup-time requirements are transferred to the

outputs on the positive-going edge of the clock

pulse. Clock triggering occurs at a voltage level

and is not directly related to the rise time of the

clock pulse. Following the hold time interval, data

at the J and K inputs may be changed without

affecting the levels at the outputs. These versatile

flip-flops can perform as toggle flip-flops by

grounding K and trying J high. They also can

perform as D-type flip-flops if J and K are tied

together.

The SN54F109 is characterized for operation over

the full military temperature range of –55°C to

125°C. The SN74F109 is characterized for

operation from 0°C to 70°C.