J556, J557 Current Regulator Diode

Features • InterFET N0016H Geometry • Low Noise: 5 nV/√Hz Typical • Low Capacitance: 2pF Typical • RoHS Compliant • SMT, TH, and Bare Die Package options. Applications • Current Regulation • Current Limiting • Biasing Description The 50V InterFET J556 and J557 JFET’s are targeted for c

文件：282.54 Kbytes 页数：4 Pages

InterFET

PNP general purpose transistors

DESCRIPTION PNP transistor in a TO-92; SOT54 plastic package. NPN complements: JC546, JC547 and JC548. FEATURES • Low current (max. 100 mA) • Low voltage (max. 65 V). APPLICATIONS • General purpose switching and amplification.

文件：44.4 Kbytes 页数：8 Pages

PHI

飞利浦

PNP general purpose transistors

DESCRIPTION PNP transistor in a TO-92; SOT54 plastic package. NPN complements: JC546, JC547 and JC548. FEATURES • Low current (max. 100 mA) • Low voltage (max. 65 V). APPLICATIONS • General purpose switching and amplification.

文件：44.4 Kbytes 页数：8 Pages

PHI

飞利浦

Dual Timer

Description The KA556 series dual monolithic timing circuits are a highly stable controller capable of producing accurate time delays or oscillation. The KA556 is a dual KA555. Timing is provided an external resistor and capacitor for each timing function. The two timers operate independently of

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Fairchild

仙童半导体