IT6510数据手册ITE中文资料规格书

描述 Description

The IT6510 is a high-performance single-chip DisplayPort to MIPI-CSI/DSI converter. Combined with DisplayPort receiver, MIPI transmitter, the IT6510 support DisplayPort input and MIPI-CSI/DSI output by conversion function.\r
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The build-in DisplayPort receiver is fully compatible with DisplayPort 1.2a and HDCP 1.3/2.3 specifications. With 4-lane HBR2 (High-Bit-Rate 2) configuration, the DP receiver can support VESA resolution up to WUXGA ( 1920x1200 @60Hz ) or WQXGA ( 2560X1600 RB @60Hz ) or support CEA resolution up to 1080P@120Hz or 4Kx2K@30Hz.\r
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The build-in MIPI transmitter is fully compliant with D-PHY V1.2 specifications. With 4-lane data pair and each lane can support up to 2.5G.\r
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IT6510 is easy to program through the I2C interface.\r
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Each IT6510 comes preprogrammed with an unique HDCP key, in compliance with the 1.3/ 2.3 --Amendment for DisplayPort, rev1.0 so as to provide secure transmission of high-definition content. Users of the IT6510 need not purchase any HDCP keys or ROMs.t.

特性 Features

• DisplayPort Receiver\r
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- Compliance with DisplayPort Specification V1.2a at 1.62/2.7/5.4 Gbps data rate (Low bit rate/High bit rate/High bit rate 2)\r
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- Support flexible 1/2/4 lanes configurations; Full 21.6Gbps data rate support (4 lanes at 5.4Gbps)\r
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- Support DPCD Rev.1.2\r
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- Support HDCP 1.3/2.3 with HDCP key embedded\r
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- Support 3D display left/right field/frame\r
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- Support Spread Spectrum Clocking up to 0.5% down-spread to reduce EMI\r
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- Bi-direction Color Space Conversion (CSC) between RGB and YCbCr color spaces with programmable coefficients.\r
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- Support 8-channel, uncompressed LPCM I2S audio with sample rates of 32~192 kHz and sample sizes of 16~24 bits, and HBR audio\r
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- Automatic loss of signal detection for Link management\r
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- Intelligent, programmable power management\r
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- Embedded two blocks EDID RAM to saving BOM cost\r
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- Compliance with “DP only” or “DP++” source device\r
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• MIPI-CSI/DSI dual mode Transmitter\r
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- Support 1/2/4-lane MIPI CSI/DSI transmission.\r
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- D-PHY TX interface of up to 2.5G per lane\r
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- Compliant with D-PHY V1.2 specifications and de-skew calibration\r
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- Compliant with MIPI CSI-2 Specification\r
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- Compliant with MIPI DSI Specification V 1.2\r
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- Support pixel rates of up to 300MHz for 4Kx2K@30Hz\r
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- Support 30/24/18 bits RGB in DSI mode\r
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- Support 888/666/565 RGB, 10b/8b YUV422, and 8b YUV420 format in CSI mode\r
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- Support Escape and ULPS mode\r
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- Support Lane Swap and PN Swap\r
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- Video Processor supports CSC\r
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- Support interlaced mode and toggling frame number in CSI mode\r
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- Support Sync pulse mode and Sync event mode in DSI operation\r
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• Common Features\r
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- Support up to 1080P@120Hz, 4Kx2K@30Hz CEA display format.\r
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- Support DP input color depth 6/8/10/12 bits\r
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- Support MIPI output color depth 8/10/12 bits\r
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- 4 I2S interface supporting 8-channel audio with sample rates of 32~192kHz and sample sizes of 16~24 bits\r
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- S/PDIF interface supporting PCM digital audio at up to 192kHz frame rate\r
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- HBR audio up to 768KHz.\r
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- Automatic Audio Error detection with soft mute function, preventing annoying harsh output sound due to audio error or hot-unplug\r
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- 88-pin QFN (10mm x 10mm) package\r
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- RoHS Compliant ( 100% Green available )