3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs

文件：451.27 Kbytes 页数：99 Pages

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1.8V In-System Programmable Ultra Low Power PLDs

文件：1.25841 Mbytes 页数：54 Pages

Lattice

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Vestigial Sideband Filter (IF= 38,0 MHz, standard D, full transmission )

Vestigial Sideband Filter (IF= 38,0 MHz, standard D, full transmission ) Pin configuration 1 - Input - ground 2 - Input 3 - Chip carrier - ground 4 – Output - ground 5 - Output

文件：122.49 Kbytes 页数：2 Pages

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3.3V/1.8V In-System Programmable SuperFAST High Density PLDs

文件：240.1 Kbytes 页数：42 Pages

Lattice

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