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ISPLSI5384VE-100LB272

In-System Programmable 3.3V SuperWIDE??High Density PLD

ispLSI 5000VE Description The ispLSI 5000VE Family of In-System Programmable High Density Logic Devices is based on Generic Logic Blocks (GLBs) of 32 registered macrocells and a single Global Routing Pool (GRP) structure interconnecting the GLBs. Outputs from the GLBs drive the Global Routing Po

文件:242.23 Kbytes 页数:22 Pages

Lattice

莱迪思

ISPLSI5384VE-100LB272I

In-System Programmable 3.3V SuperWIDE??High Density PLD

ispLSI 5000VE Description The ispLSI 5000VE Family of In-System Programmable High Density Logic Devices is based on Generic Logic Blocks (GLBs) of 32 registered macrocells and a single Global Routing Pool (GRP) structure interconnecting the GLBs. Outputs from the GLBs drive the Global Routing Po

文件:242.23 Kbytes 页数:22 Pages

Lattice

莱迪思

ISPLSI5384VE-100LF256

In-System Programmable 3.3V SuperWIDE??High Density PLD

ispLSI 5000VE Description The ispLSI 5000VE Family of In-System Programmable High Density Logic Devices is based on Generic Logic Blocks (GLBs) of 32 registered macrocells and a single Global Routing Pool (GRP) structure interconnecting the GLBs. Outputs from the GLBs drive the Global Routing Po

文件:242.23 Kbytes 页数:22 Pages

Lattice

莱迪思

ISPLSI5384VE-100LF256I

In-System Programmable 3.3V SuperWIDE??High Density PLD

ispLSI 5000VE Description The ispLSI 5000VE Family of In-System Programmable High Density Logic Devices is based on Generic Logic Blocks (GLBs) of 32 registered macrocells and a single Global Routing Pool (GRP) structure interconnecting the GLBs. Outputs from the GLBs drive the Global Routing Po

文件:242.23 Kbytes 页数:22 Pages

Lattice

莱迪思

ISPLSI5384VE-125LB272

In-System Programmable 3.3V SuperWIDE??High Density PLD

ispLSI 5000VE Description The ispLSI 5000VE Family of In-System Programmable High Density Logic Devices is based on Generic Logic Blocks (GLBs) of 32 registered macrocells and a single Global Routing Pool (GRP) structure interconnecting the GLBs. Outputs from the GLBs drive the Global Routing Po

文件:242.23 Kbytes 页数:22 Pages

Lattice

莱迪思

ISPLSI5384VE-125LB272I

In-System Programmable 3.3V SuperWIDE??High Density PLD

ispLSI 5000VE Description The ispLSI 5000VE Family of In-System Programmable High Density Logic Devices is based on Generic Logic Blocks (GLBs) of 32 registered macrocells and a single Global Routing Pool (GRP) structure interconnecting the GLBs. Outputs from the GLBs drive the Global Routing Po

文件:242.23 Kbytes 页数:22 Pages

Lattice

莱迪思

ISPLSI5384VE-125LF256

In-System Programmable 3.3V SuperWIDE??High Density PLD

ispLSI 5000VE Description The ispLSI 5000VE Family of In-System Programmable High Density Logic Devices is based on Generic Logic Blocks (GLBs) of 32 registered macrocells and a single Global Routing Pool (GRP) structure interconnecting the GLBs. Outputs from the GLBs drive the Global Routing Po

文件:242.23 Kbytes 页数:22 Pages

Lattice

莱迪思

ISPLSI5384VE-125LF256I

In-System Programmable 3.3V SuperWIDE??High Density PLD

ispLSI 5000VE Description The ispLSI 5000VE Family of In-System Programmable High Density Logic Devices is based on Generic Logic Blocks (GLBs) of 32 registered macrocells and a single Global Routing Pool (GRP) structure interconnecting the GLBs. Outputs from the GLBs drive the Global Routing Po

文件:242.23 Kbytes 页数:22 Pages

Lattice

莱迪思

ISPLSI5384VE-165LB272

In-System Programmable 3.3V SuperWIDE??High Density PLD

ispLSI 5000VE Description The ispLSI 5000VE Family of In-System Programmable High Density Logic Devices is based on Generic Logic Blocks (GLBs) of 32 registered macrocells and a single Global Routing Pool (GRP) structure interconnecting the GLBs. Outputs from the GLBs drive the Global Routing Po

文件:242.23 Kbytes 页数:22 Pages

Lattice

莱迪思

ISPLSI5384VE-165LF256

In-System Programmable 3.3V SuperWIDE??High Density PLD

ispLSI 5000VE Description The ispLSI 5000VE Family of In-System Programmable High Density Logic Devices is based on Generic Logic Blocks (GLBs) of 32 registered macrocells and a single Global Routing Pool (GRP) structure interconnecting the GLBs. Outputs from the GLBs drive the Global Routing Po

文件:242.23 Kbytes 页数:22 Pages

Lattice

莱迪思

详细参数

  • 型号:

    ISPLSI5384VE-1

  • 功能描述:

    CPLD - 复杂可编程逻辑器件

  • RoHS:

  • 制造商:

    Lattice

  • 存储类型:

    EEPROM

  • 大电池数量:

    128

  • 最大工作频率:

    333 MHz

  • 延迟时间:

    2.7 ns

  • 可编程输入/输出端数量:

    64

  • 工作电源电压:

    3.3 V

  • 最大工作温度:

    + 90 C

  • 最小工作温度:

    0 C

  • 封装/箱体:

    TQFP-100

供应商型号品牌批号封装库存备注价格
LATTICE
24+
BGA
30617
LATTICE专营品牌全新原装热卖
询价
LATTICE
25+23+
BGA272
24522
绝对原装正品全新进口深圳现货
询价
LatticeSemiconductorCorp
24+
272-BGA(27x27)
66800
原厂授权一级代理,专注汽车、医疗、工业、新能源!
询价
LATTICE
20+
BGA272
11520
特价全新原装公司现货
询价
Lattice Semiconductor Corporat
24+
272-BGA(27x27)
56200
一级代理/放心采购
询价
LATTICE
25+
BGA-272
1001
就找我吧!--邀您体验愉快问购元件!
询价
LATTICE
2138+
BGA
8960
专营BGA,QFP原装现货,假一赔十
询价
Lattice Semiconductor Corporat
23+
272-BBGA
11200
主营:汽车电子,停产物料,军工IC
询价
LATTICE
21+
BGA
10000
原装现货假一罚十
询价
LATTICE
22+
BGA272
6000
十年配单,只做原装
询价
更多ISPLSI5384VE-1供应商 更新时间2025-10-31 16:56:00