In-System Programmable High Density PLD

文件：163.44 Kbytes 页数：13 Pages

Lattice

莱迪思

In-System Programmable High Density PLD

文件：163.44 Kbytes 页数：13 Pages

Lattice

莱迪思

In-System Programmable High Density PLD

文件：163.44 Kbytes 页数：13 Pages

Lattice

莱迪思

In-System Programmable High Density PLD

文件：163.44 Kbytes 页数：13 Pages

Lattice

莱迪思

In-System Programmable High Density PLD

文件：163.44 Kbytes 页数：13 Pages

Lattice

莱迪思

In-System Programmable High Density PLD

文件：163.44 Kbytes 页数：13 Pages

Lattice

莱迪思

In-System Programmable High Density PLD

文件：163.44 Kbytes 页数：13 Pages

Lattice

莱迪思

In-System Programmable High Density PLD

Description\nThe ispLSI 3256A is a High-Density Programmable Logic Device containing 384 Registers, 128 Universal I/O pins, five Dedicated Clock Input Pins, eight Output Routing Pools (ORP) and a Global Routing Pool (GRP) which allows complete inter-connectivity between all of these elements. The is • HIGH-DENSITY PROGRAMMABLE LOGIC\n   — 128 I/O Pins\n   — 11000 PLD Gates\n   — 384 Registers\n   — High Speed Global Interconnect\n   — Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc.\n   — Small Logic Block Size for Random Logic\n• HIGH-PERFORMANCE E2CMOS® TECHNOLOGY\n;

Lattice

莱迪思

In-System Programmable High Density PLD

Lattice

莱迪思