In-System Programmable High Density PLD

Description The ispLSI 1032EA is a High Density Programmable Logic Device containing 192 Registers, 64 Universal I/O pins, four Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements. The isp

文件：172.09 Kbytes 页数：16 Pages

Lattice

莱迪思

In-System Programmable High Density PLD

Description The ispLSI 1032EA is a High Density Programmable Logic Device containing 192 Registers, 64 Universal I/O pins, four Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements. The isp

文件：198.63 Kbytes 页数：16 Pages

Lattice

莱迪思

In-System Programmable High Density PLD

Description The ispLSI 1032EA is a High Density Programmable Logic Device containing 192 Registers, 64 Universal I/O pins, four Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements. The isp

文件：172.09 Kbytes 页数：16 Pages

Lattice

莱迪思

PGA133

Lattice

莱迪思

上传：千层芯半导体(深圳)有限公司

TQFP100

LATTICE/莱迪斯

上传：深圳庞田科技有限公司