ISO7221CHD中文资料德州仪器数据手册PDF规格书

1FEATURES

• 1-, 5- and 25-Mbps Signaling Rate Options

– Low Channel-to-Channel Output Skew;

1 ns max

– Low Pulse-Width Distortion (PWD);

1 ns max

– Low Jitter Content; 1 ns Typ at 150 Mbps

• 4000-Vpeak Isolation, 560 Vpeak VIORM

– UL 1577 Approved

– 50-kV/μs Typical Transient Immunity

• Operates with 3.3-V or 5-V Supplies

• 4-kV ESD Protection

• High Electromagnetic Immunity

APPLICATIONS

• Down-Hole Drilling

• High Temperature Environments

SUPPORTS EXTREME TEMPERATURE

APPLICATIONS

Controlled Baseline

One Assembly and Test Site

One Fabrication Site

Available in Extreme (–55°C to 175°C)

Temperature Range (1) (2)

Extended Product Life Cycle

Extended Product-Change Notification

Product Traceability

Texas Instruments high temperature products

utilize highly optimized silicon (die) solutions

with design and process enhancements to

maximize performance over extended

temperatures.

DESCRIPTION

The ISO7221 is a dual-channel digital isolator. To facilitate PCB layout, the channels are oriented in the opposite

directions. This device has a logic input and output buffer separated by TI’s silicon-dioxide (SiO2) isolation

barrier, providing galvanic isolation of up to 4000 V. Used in conjunction with isolated power supplies, this device

blocks high voltage, isolates grounds, and prevents noise currents on a data bus or other circuits from entering

the local ground and interfering with or damaging sensitive circuitry.

A binary input signal is conditioned, translated to a balanced signal, then differentiated by the capacitive isolation

barrier. Across the isolation barrier, a differential comparator receives the logic transition information, then sets or

resets a flip-flop and the output circuit accordingly. A periodic update pulse is sent across the barrier to ensure

the proper dc level of the output. If this dc-refresh pulse is not received every 4 μs, the input is assumed to be

unpowered or not being actively driven, and the failsafe circuit drives the output to a logic high state.

The small capacitance and resulting time constant provide fast operation with signaling rates available from

0 Mbps (dc) to 150 Mbps. (3) The A-, B- and C-option devices have TTL input thresholds and a noise filter at the

input that prevents transient pulses from being passed to the output of the device. The M-option devices have

CMOS VCC/2 input thresholds and do not have the input noise-filter and the additional propagation delay.