Low Noise, Low Power I2C Bus, 256 Taps

Low Noise, Low Power I2C® Bus, 256 Taps The ISL90840 integrates four digitally controlled potentiometers (XDCP) on a monolithic CMOS integrated circuit. The digitally controlled potentiometers are implemented with a combination of resistor elements and CMOS switches. The position of the wipers a

文件：1.12783 Mbytes 页数：12 Pages

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Quad Digitally Controlled Potentiometers (XDCP™)

Features • Four potentiometers in one package • 256 resistor taps - 0.4 resolution • I2C serial interface - Three address pins, up to eight devices/bus - Write/Read capability • Power-on preset to mid-scale (128 tap position) • Wiper resistance: 70 typical @ 3.3V • Standby current

文件：1.08627 Mbytes 页数：13 Pages

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DIGITAL POTENTIOMETERS

文件：1.77378 Mbytes 页数：8 Pages

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Low Noise, Low Power I2C Bus, 256 Taps

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瑞萨

丝印：ISL90840UA27Z；Package：TSSOP；Quad Digitally Controlled Potentiometers (XDCP™)

Features • Four potentiometers in one package • 256 resistor taps - 0.4 resolution • I2C serial interface - Three address pins, up to eight devices/bus - Write/Read capability • Power-on preset to mid-scale (128 tap position) • Wiper resistance: 70 typical @ 3.3V • Standby current

文件：1.08627 Mbytes 页数：13 Pages

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瑞萨

丝印：ISL90840UI27；Package：TSSOP；Quad Digitally Controlled Potentiometers (XDCP™)

Features • Four potentiometers in one package • 256 resistor taps - 0.4 resolution • I2C serial interface - Three address pins, up to eight devices/bus - Write/Read capability • Power-on preset to mid-scale (128 tap position) • Wiper resistance: 70 typical @ 3.3V • Standby current

文件：1.08627 Mbytes 页数：13 Pages

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瑞萨

Low Noise, Low Power I2C Bus, 256 Taps

Low Noise, Low Power I2C® Bus, 256 Taps The ISL90840 integrates four digitally controlled potentiometers (XDCP) on a monolithic CMOS integrated circuit. The digitally controlled potentiometers are implemented with a combination of resistor elements and CMOS switches. The position of the wipers a

文件：1.12783 Mbytes 页数：12 Pages

INTERSIL

丝印：ISL90840UI27Z；Package：TSSOP；Quad Digitally Controlled Potentiometers (XDCP™)

Features • Four potentiometers in one package • 256 resistor taps - 0.4 resolution • I2C serial interface - Three address pins, up to eight devices/bus - Write/Read capability • Power-on preset to mid-scale (128 tap position) • Wiper resistance: 70 typical @ 3.3V • Standby current

文件：1.08627 Mbytes 页数：13 Pages

RENESAS

瑞萨

Low Noise, Low Power I2C Bus, 256 Taps

Low Noise, Low Power I2C® Bus, 256 Taps The ISL90840 integrates four digitally controlled potentiometers (XDCP) on a monolithic CMOS integrated circuit. The digitally controlled potentiometers are implemented with a combination of resistor elements and CMOS switches. The position of the wipers a

文件：1.12783 Mbytes 页数：12 Pages

INTERSIL

丝印：ISL90840WA27Z；Package：TSSOP；Quad Digitally Controlled Potentiometers (XDCP™)

Features • Four potentiometers in one package • 256 resistor taps - 0.4 resolution • I2C serial interface - Three address pins, up to eight devices/bus - Write/Read capability • Power-on preset to mid-scale (128 tap position) • Wiper resistance: 70 typical @ 3.3V • Standby current

文件：1.08627 Mbytes 页数：13 Pages

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