ISL70003SEH数据手册Renesas中文资料规格书

描述 Description

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The ISL70003SEH is a radiation and SEE hardened synchronous buck regulator capable of operating over an input voltage range of 3. 0V to 13. 2V. With integrated MOSFETs, this highly efficient single chip power solution provides a tightly regulated output voltage that is externally adjustable from 0. 6V to ~90% of the input voltage. Continuous output load current capability is 6A for TJ ≤ +125°C and 3A for TJ ≤ +150°C. The ISL70003SEH uses voltage mode control architecture with feed-forward and switches at a selectable frequency of 500kHz or 300kHz. Loop compensation is externally adjustable to allow for an optimum balance between stability and output dynamic performance. The internal synchronous power switches are optimized for high efficiency and excellent thermal performance. The chip features two logic-level disable inputs that can be used to inhibit pulses on the phase (LXx) pins in order to maximize efficiency based on the load current. The ISL70003SEH also supports DDR applications and contains a buffer amplifier for generating the VREF voltage. High integration, best in class radiation performance and a feature-filled design make the ISL70003SEH an ideal choice to power many of today's small form-factor applications.

特性 Features

• Acceptance tested to 50krad(Si) (LDR) wafer-by-wafer
• ±1% reference voltage over line, temperature, and radiation
• Integrated MOSFETs 31mΩ PFET/21mΩ NFET
• 95% peak efficiency
• Externally adjustable loop compensation
• Supports DDR applications (VTT tracks VDDQ/2)
• Buffer amplifier for generating VREF voltage
• 3A current sinking capability
• Grounded lid eliminates charge build up
• IMON pin for output current monitoring
• Adjustable analog soft-start
• Diode emulation for increased efficiency at light loads
• 500kHz or 300kHz operating frequency synch wording
• Monotonic start-up into prebiased load
• Full military temperature range operation
• TA = -55°C to +125°C
• TJ = -55°C to +150°C
• Radiation tolerance
• High dose rate (50-300rad(Si)/s): 100krad(Si)
• Low dose rate (0.01rad(Si)/s): 100krad(Si)** Limit established by characterization.
• SEE hardness
• SEB and SEL LETTH: 86.4MeV•cm2/mg
• SET at LET 86.4MeV•cm2/mg: < ±3% ΔVOUT
• SEFI LETTH: 60MeV•cm2/mg
• Electrically screened to DLA SMD 5962-14203

应用 Application

• FPGA, CPLD, DSP, CPU Core and I/O supply voltages
• DDR memory supply voltages
• Low-voltage, high-density distributed power systems