ISL6414IR中文资料INTERSIL数据手册PDF规格书

Triple Output, Low-Noise LDO Regulator with Integrated Reset Circuit

The ISL6414 is an ultra low noise triple output LDO regulator with microprocessor reset circuit and is optimized for powering wireless chip sets.

特性 Features

• Small DC/DC Converter Size

- Three LDOs and RESET Circuitry in a Low-Profile 4x4mm QFN Package

• High Output Current

- LDO1, 1.8V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500mA

- LDO2, 2.84V. . . . . . . . . . . . . . . . . . . . . . . . . . . . 300mA

- LDO3, 2.84V. . . . . . . . . . . . . . . . . . . . . . . . . . . . 200mA

• Ultra-Low Dropout Voltage

- LDO2, 2.84V. . . . . . . . . . . . . . . 125mV (typ.) at 300mA

- LDO3, 2.84V. . . . . . . . . . . . . . . 100mV (typ.) at 200mA

• Ultra-Low Output Voltage Noise

- <30µVRMS (typ.) for LDO3 (VCO Supply)

• Stable with Smaller Ceramic Output Capacitors

• Voltage Sequencing for BBP/MAC and Analog Supplies

• Extensive Protection and Monitoring Features

- Overcurrent and short circuit protection

- Thermal shutdown

- Reverse battery protection

- FAULT indicator

• Logic-Controlled Dual Shutdown Pins

• Integrated Microprocessor Reset Circuit

- Programmable Reset Delay

- Complimentary Reset Outputs

• Proven Reference Design for Total WLAN System Solution

• QFN Package Option

- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat

No Leads - Product Outline

- Near Chip-Scale Package Footprint Improves PCB

Efficiency and Is Thinner in Profile

• Pb-Free Plus Anneal Available (RoHS Compliant)

Applications

• PRISM® 3, PRISM GT™, and PRISM WWR Chipsets

• WLAN Cards

- PCMCIA, Cardbus32, MiniPCI Cards

- Compact Flash Cards

• Hand-Held Instruments