IS67WVE1M16ECLL中文资料矽成半导体数据手册PDF规格书

特性 Features

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Asynchronous and page mode interface

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Dual voltage rails for optional performance

ALL: VDD 1.7V~1.95V, VDDQ 1.7V~1.95VBLL: VDD 2.7V~3.6V, VDDQ 2.7V~3.6VCLL: VDD 1.7V~1.95V, VDDQ 2.7V~3.6V

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Page mode read access

InterpageRead access : 60ns, 70ns

IntrapageRead access : 25ns

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Low Power Consumption

Asynchronous Operation < 30 mA

IntrapageRead < 23mA

Standby < 150 μA (max.) at -40°C~85°C

Deep power-down (DPD)

ALL/CLL: < 3μA (Typ)

BLL: < 10μA (Typ)

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Low Power Feature

Temperature Controlled Refresh

Partial Array Refresh

Deep power-down (DPD) mode

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Operating temperature Range

Industrial: -40°C~85°CAutomotive A1: -40°C~85°C

Automotive A2: -40°C~105°C

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Packages: 48-ball TFBGA, 48-pin TSOP-I