IS61NW6432-5TQ中文资料ICSI数据手册PDF规格书

DESCRIPTION

The IS61NW6432 is a high-speed, low-power synchronous static RAM designed to provide a burstable, high-performance, no-wait bus, secondary cache for the Pentium, 680X0, and Power PC microprocessors. It is organized as 65,536 words by 32 bits, fabricated with ISSIs advanced CMOS technology.

FEATURES

• Fast access time:

– 5 ns-100 MHz; 6 ns-83 MHz;

– 7 ns-75 MHz; 8 ns-66 MHz

• No wait cycles between Read and Write

• Internal self-timed write cycle

• Individual Byte Write Control

• Clock controlled, registered address, data and control

• Pentium™ or linear burst sequence control using MODE input

• Three chip enables for simple depth expansion and address pipelining

• Common data inputs and data outputs

• JEDEC 100-pin TQFP and PQFP package

• Single +3.3V power supply

• Optional data strobe pin (#80) for latching data (See page 12 for detailed timing)