1Mb x 36 and 2Mb x 18 STATE BUS SRAM

DESCRIPTION The 36 Meg NLP/NVP product family feature high-speed, low-power synchronous static RAMs designed to provide a burstable, high-performance, no wait state, device for networking and communications applications. They are organized as 1M words by 36 bits and 2M words by 18 bits, fabricate

文件：228.58 Kbytes 页数：22 Pages

ISSI

矽成半导体

1Mb x 36 and 2Mb x 18 STATE BUS SRAM

DESCRIPTION The 36 Meg NLP/NVP product family feature high-speed, low-power synchronous static RAMs designed to provide a burstable, high-performance, no wait state, device for networking and communications applications. They are organized as 1M words by 36 bits and 2M words by 18 bits, fabricate

文件：228.58 Kbytes 页数：22 Pages

ISSI

矽成半导体

1Mb x 36 and 2Mb x 18 STATE BUS SRAM

DESCRIPTION The 36 Meg NLP/NVP product family feature high-speed, low-power synchronous static RAMs designed to provide a burstable, high-performance, no wait state, device for networking and communications applications. They are organized as 1M words by 36 bits and 2M words by 18 bits, fabricate

文件：228.58 Kbytes 页数：22 Pages

ISSI

矽成半导体

1Mb x 36 and 2Mb x 18 STATE BUS SRAM

DESCRIPTION The 36 Meg NLP/NVP product family feature high-speed, low-power synchronous static RAMs designed to provide a burstable, high-performance, no wait state, device for networking and communications applications. They are organized as 1M words by 36 bits and 2M words by 18 bits, fabricate

文件：228.58 Kbytes 页数：22 Pages

ISSI

矽成半导体