128K x 32, 128K x 36, and 256K x 18 4Mb, PIPELINE (NO WAIT) STATE BUS SRAM

DESCRIPTION The 4 Meg NLP/NVP product family feature high-speed, low-power synchronous static RAMs designed to provide a burstable, high-performance, no wait state, device for networking and communications applications. They are organized as 128K words by 32 bits, 128K words by 36 bits, and 256K

文件：200.09 Kbytes 页数：29 Pages

ISSI

矽成半导体

128K x 32, 128K x 36, and 256K x 18 STATE BUS SRAM

DESCRIPTION The 4 Meg NLP/NVP product family feature high-speed, low-power synchronous static RAMs designed to provide a burstable, high-performance, no wait state, device for networking and communications applications. They are organized as 128K words by 32 bits, 128K words by 36 bits, and 256K

文件：528.09 Kbytes 页数：29 Pages

ISSI

矽成半导体

128K x 32, 128K x 36, and 256K x 18 4Mb, PIPELINE (NO WAIT) STATE BUS SRAM

DESCRIPTION The 4 Meg NLP/NVP product family feature high-speed, low-power synchronous static RAMs designed to provide a burstable, high-performance, no wait state, device for networking and communications applications. They are organized as 128K words by 32 bits, 128K words by 36 bits, and 256K

文件：200.09 Kbytes 页数：29 Pages

ISSI

矽成半导体

128K x 32, 128K x 36, and 256K x 18 STATE BUS SRAM

DESCRIPTION The 4 Meg NLP/NVP product family feature high-speed, low-power synchronous static RAMs designed to provide a burstable, high-performance, no wait state, device for networking and communications applications. They are organized as 128K words by 32 bits, 128K words by 36 bits, and 256K

文件：528.09 Kbytes 页数：29 Pages

ISSI

矽成半导体