512K x36 and 1024K x18 18Mb, FLOW THROUGH NO WAIT STATE BUS SYNCHRONOUS SRAM

FEATURES • 100 percent bus utilization • No wait cycles between Read and Write • Internal self-timed write cycle • Individual Byte Write Control • Single R/W (Read/Write) control pin • Clock controlled, registered address, data and control • Interleaved or linear burst sequence control usin

文件：1.88306 Mbytes 页数：39 Pages

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, FLOW THROUGH NO WAIT STATE BUS SYNCHRONOUS SRAM

FEATURES • 100 percent bus utilization • No wait cycles between Read and Write • Internal self-timed write cycle • Individual Byte Write Control • Single R/W (Read/Write) control pin • Clock controlled, registered address, data and control • Interleaved or linear burst sequence control usin

文件：1.88306 Mbytes 页数：39 Pages

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, FLOW THROUGH NO WAIT STATE BUS SYNCHRONOUS SRAM

FEATURES • 100 percent bus utilization • No wait cycles between Read and Write • Internal self-timed write cycle • Individual Byte Write Control • Single R/W (Read/Write) control pin • Clock controlled, registered address, data and control • Interleaved or linear burst sequence control usin

文件：1.88306 Mbytes 页数：39 Pages

ISSI

矽成半导体

512K x36 and 1024K x18 18Mb, FLOW THROUGH NO WAIT STATE BUS SYNCHRONOUS SRAM

FEATURES • 100 percent bus utilization • No wait cycles between Read and Write • Internal self-timed write cycle • Individual Byte Write Control • Single R/W (Read/Write) control pin • Clock controlled, registered address, data and control • Interleaved or linear burst sequence control usin

文件：1.88306 Mbytes 页数：39 Pages

ISSI

矽成半导体