256K x 72, 512K x 36 and 1M x 18 18Mb, FLOW THROUGH NO WAIT STATE BUS SRAM

FEATURES • 100 percent bus utilization • No wait cycles between Read and Write • Internal self-timed write cycle • Individual Byte Write Control • Single Read/Write control pin • Clock controlled, registered address, data and control • Interleaved or linear burst sequence control using MO

文件：544.38 Kbytes 页数：35 Pages

ISSI

矽成半导体

256K x 72, 512K x 36 and 1M x 18 18Mb, FLOW THROUGH (NO WAIT) STATE BUS SRAM

文件：251.56 Kbytes 页数：35 Pages

ISSI

矽成半导体

256K x 72, 512K x 36 and 1M x 18 18Mb, FLOW THROUGH NO WAIT STATE BUS SRAM

FEATURES • 100 percent bus utilization • No wait cycles between Read and Write • Internal self-timed write cycle • Individual Byte Write Control • Single Read/Write control pin • Clock controlled, registered address, data and control • Interleaved or linear burst sequence control using MO

文件：544.38 Kbytes 页数：35 Pages

ISSI

矽成半导体

256K x 72, 512K x 36 and 1M x 18 18Mb, FLOW THROUGH NO WAIT STATE BUS SRAM

FEATURES • 100 percent bus utilization • No wait cycles between Read and Write • Internal self-timed write cycle • Individual Byte Write Control • Single Read/Write control pin • Clock controlled, registered address, data and control • Interleaved or linear burst sequence control using MO

文件：544.38 Kbytes 页数：35 Pages

ISSI

矽成半导体

256K x 72, 512K x 36 and 1M x 18 18Mb, FLOW THROUGH (NO WAIT) STATE BUS SRAM

文件：251.56 Kbytes 页数：35 Pages

ISSI

矽成半导体