IS61LP6436A-166TQLI中文资料矽成半导体数据手册PDF规格书

FEATURES

• Internal self-timed write cycle

• Individual Byte Write Control and Global Write

• Clock controlled, registered address, data and

control

• Pentium™ or linear burst sequence control using

MODE input

• Three chip enables for simple depth expansion

and address pipelining

• Common data inputs and data outputs

• JEDEC 100-Pin TQFP package

• Power-down snooze mode

• Power Supply:

+3.3V Vdd

+3.3V or 2.5V Vddq (I/O)

• Lead-free available