IS61LF6432A-8.5TQLI中文资料矽成半导体数据手册PDF规格书

FEATURES

• Internal self-timed write cycle

• Individual Byte Write Control and Global Write

• Clock controlled, registered address, data and

control

• Interleaved or linear burst sequence control using

MODE input

• Three chip enables for simple depth expansion

and address pipelining

• Common data inputs and data outputs

• Power-down control by ZZ input

• JEDEC 100-Pin TQFP package

• Power Supply:

+3.3V Vdd

+3.3V or 2.5V Vddq

• Control pins mode upon power-up:

– MODE in interleave burst mode

– ZZ in normal operation mode

• Industrial Temperature Available:

(-40oC to +85oC)

• Lead-free available