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IS46TR82560C-15HBLA2中文资料矽成半导体数据手册PDF规格书
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IS46TR82560C-15HBLA2规格书详情
FEATURES
Standard Voltage: VDD and VDDQ = 1.5V ± 0.075V
Low Voltage (L): VDD and VDDQ = 1.35V + 0.1V, -0.067V - Backward compatible to 1.5V
High speed data transfer rates with system frequency up to 933 MHz
8 internal banks for concurrent operation
8n-Bit pre-fetch architecture
Programmable CAS Latency
Programmable Additive Latency: 0, CL-1,CL-2
Programmable CAS WRITE latency (CWL) based on tCK
Programmable Burst Length: 4 and 8
Programmable Burst Sequence: Sequential or Interleave
BL switch on the fly
Auto Self Refresh(ASR)
Self Refresh Temperature(SRT)
Refresh Interval:
7.8 us (8192 cycles/64 ms) Tc= -40°C to 85°C
3.9 us (8192 cycles/32 ms) Tc= 85°C to 105°C
Partial Array Self Refresh
Asynchronous RESET pin
TDQS (Termination Data Strobe) supported (x8 only)
OCD (Off-Chip Driver Impedance Adjustment)
Dynamic ODT (On-Die Termination)
Driver strength : RZQ/7, RZQ/6 (RZQ = 240 Ω)
Write Leveling
Up to 200 MHz in DLL off mode
Operating temperature:
Commercial (TC = 0°C to +95°C)
Industrial (TC = -40°C to +95°C)
Automotive, A1 (TC = -40°C to +95°C)
Automotive, A2 (TC = -40°C to +105°C)
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8850 |
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11200 |
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ISSI |
23+ |
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89630 |
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