IS46TR16256ECL-125LB3LA1中文资料矽成半导体数据手册PDF规格书

FEATURES

• Standard Voltage: VDD and VDDQ = 1.5V ± 0.075V

• Low Voltage (L): VDD and VDDQ = 1.35V + 0.1V, -0.067V

- Backward compatible to 1.5V

• 8 internal banks for concurrent operation

• 8n-Bit pre-fetch architecture

• Programmable CAS Latency

• Programmable Additive Latency: 0, CL-1,CL-2

• Programmable CAS WRITE latency (CWL) based

on tCK

• Programmable Burst Length: 4 and 8

• Programmable Burst Sequence: Sequential or

Interleave

• BL switch on the fly

• Auto Self Refresh(ASR)

• Self Refresh Temperature(SRT)

• Refresh Interval:

7.8 μs (8192 cycles/64 ms) Tc= -40°C to 85°C

3.9 μs (8192 cycles/32 ms) Tc= 85°C to 95°C

1.95 μs (8192 cycles/16 ms) Tc= 95°C to 105°C

0.97 μs (8192 cycles/8 ms) Tc= 105°C to 115°C

0.488 μs (8192 cycles/4 ms) Tc= 115°C to 125°C

• Partial Array Self Refresh

• Asynchronous RESET pin