2M x 16Bits x 4Banks Mobile DDR SDRAM

Features • JEDEC standard 1.8V power supply. • VDD = 1.8V, VDDQ = 1.8V • Four internal banks for concurrent operation • MRS cycle with address key programs - CAS latency 2, 3 (clock) - Burst length (2, 4, 8, 16) - Burst type (sequential & interleave) • Fully differential clock inputs (CK,

文件：1.77401 Mbytes 页数：42 Pages

ISSI

矽成半导体

DM for write masking only

文件：1.85631 Mbytes 页数：43 Pages

ISSI

矽成半导体

2M x 16Bits x 4Banks Mobile DDR SDRAM

Features • JEDEC standard 1.8V power supply. • VDD = 1.8V, VDDQ = 1.8V • Four internal banks for concurrent operation • MRS cycle with address key programs - CAS latency 2, 3 (clock) - Burst length (2, 4, 8, 16) - Burst type (sequential & interleave) • Fully differential clock inputs (CK,

文件：1.77401 Mbytes 页数：42 Pages

ISSI

矽成半导体

2M x 16Bits x 4Banks Mobile DDR SDRAM

Features • JEDEC standard 1.8V power supply. • VDD = 1.8V, VDDQ = 1.8V • Four internal banks for concurrent operation • MRS cycle with address key programs - CAS latency 2, 3 (clock) - Burst length (2, 4, 8, 16) - Burst type (sequential & interleave) • Fully differential clock inputs (CK,

文件：1.77401 Mbytes 页数：42 Pages

ISSI

矽成半导体

2M x 16Bits x 4Banks Mobile DDR SDRAM

Features • JEDEC standard 1.8V power supply. • VDD = 1.8V, VDDQ = 1.8V • Four internal banks for concurrent operation • MRS cycle with address key programs - CAS latency 2, 3 (clock) - Burst length (2, 4, 8, 16) - Burst type (sequential & interleave) • Fully differential clock inputs (CK,

文件：1.77401 Mbytes 页数：42 Pages

ISSI

矽成半导体

Package：60-TFBGA；包装：托盘 类别：集成电路（IC） 存储器 描述：IC DRAM 128MBIT PARALLEL 60TFBGA

ISSI, Integrated Silicon Solution Inc

Package：60-TFBGA；包装：卷带（TR） 类别：集成电路（IC） 存储器 描述：IC DRAM 128MBIT PARALLEL 60TFBGA

ISSI, Integrated Silicon Solution Inc

Package：60-TFBGA；包装：卷带（TR） 类别：集成电路（IC） 存储器 描述：IC DRAM 128MBIT PARALLEL 60TFBGA

ISSI, Integrated Silicon Solution Inc