IS24C52-2G中文资料北京矽成数据手册PDF规格书

DESCRIPTION

The IS24C52 is an electrically erasable PROM device that uses the standard 2-wire interface for communications. The IS24C52 contains a memory array of 2,048-bits (256K x 8), and is further subdivided into 16 pages of 16 bytes each for page-write mode. The software write-protection feature is initiated with a unique irreversible instruction. After this command is transmitted, the first 128 bytes of the array become permanently read-only. This feature is popular in applications like DRAM DIMMs to retain DRAM related data. This EEPROM is offered in wide operating voltages of 1.8V to 5.5V (IS24C52-2) and 2.5V to 5.5V (IS24C52-3) to be compatible with most application voltages. ISSI designed the IS24C52 as a low-cost and low-power 2-wire EEPROM solution. The devices are packaged in 8-pin SOIC, and 8-pin TSSOP, and 8-pin MSOP.

FEATURES

• Two-Wire Serial Interface

– Bidirectional data transfer protocol

– 400 kHz (I2C TM Protocol) Compatibility

• Organization:

– 256-bit x 8-bit

• Data Protection Features

– Write Protect Pin

– Permanent Software Protection

• 16-Byte Page Write Buffer

– Partial Page-writes permitted

• Low Power CMOS Technology

– Active Current less than 2 mA (5V)

– Standby Current less than 6 µA (5V)

– Standby Current less than 2 µA (2.5V)

• Low Voltage Operation

– IS24C52-2: Vcc = 1.8V to 5.5V

– IS24C52-3: Vcc = 2.5V to 5.5V

• Random or Sequential Read Modes

• Filtered Inputs for Noise Suppression

• Self timed Write cycle with auto clear

– 5 ms @ 2.5V

• High Reliability

– Endurance: 1,000,000 Cycles

– Data Retention: 40 Years

• Commercial and Industrial temperature ranges

• 8-pin SOIC, 8-pin TSSOP, and 8-pin MSOP