PCIX I/O System Clock Generator with EMI Control Features

Features • Dedicated clock buffer power pins for reduced noise, crosstalk and jitter • Input clock frequency of 25 MHz to 33.3 MHz • Output frequencies of XINx1, XINx2, XINx3 and XINx4 • Output grouped in two banks of five clocks each • One REF XIN clock output • SMBus clock control interfac

文件：263.15 Kbytes 页数：11 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

PCIX I/O System Clock Generator with EMI Control Features

Features • Dedicated clock buffer power pins for reduced noise, crosstalk and jitter • Input clock frequency of 25 MHz to 33.3 MHz • Output frequencies of XINx1, XINx2, XINx3 and XINx4 • Output grouped in two banks of five clocks each • One REF XIN clock output • SMBus clock control interfac

文件：154.45 Kbytes 页数：10 Pages

SILABS

芯科科技

PCIX I/O System Clock Generator with EMI Control Features

Features • Dedicated clock buffer power pins for reduced noise, crosstalk and jitter • Input clock frequency of 25 MHz to 33.3 MHz • Output frequencies of XINx1, XINx2, XINx3 and XINx4 • Output grouped in two banks of five clocks each • One REF XIN clock output • SMBus clock control interfac

文件：263.15 Kbytes 页数：11 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

PCIX I/O System Clock Generator with EMI Control Features

Features • Dedicated clock buffer power pins for reduced noise, crosstalk and jitter • Input clock frequency of 25 MHz to 33.3 MHz • Output frequencies of XINx1, XINx2, XINx3 and XINx4 • Output grouped in two banks of five clocks each • One REF XIN clock output • SMBus clock control interfac

文件：154.45 Kbytes 页数：10 Pages

SILABS

芯科科技