WAN PLL WITH DUAL REFERENCE INPUTS

DESCRIPTION The IDT82V3002A is a WAN PLL with dual reference inputs. It contains a Digital Phase-Locked Loop (DPLL), which generates ST-BUS clocks and framing signals that are phase locked to a 2.048 MHz, 1.544 MHz or 8 kHz input reference. FEATURES • Supports AT&T TR62411 and Telcordia GR-

文件：390.86 Kbytes 页数：28 Pages

IDT

WAN PLL WITH DUAL REFERENCE INPUTS

FEATURES • Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 3, Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces • Supports ITU-T G.813 Option 1 clocks for 2048 kbit/s interfaces • Supports ITU-T G.812 Type IV clocks for 1544 kbit/s interface and 2048 kbit/s interfaces • Su

文件：1.47622 Mbytes 页数：30 Pages

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WAN PLL WITH DUAL REFERENCE INPUTS

文件：1.30694 Mbytes 页数：29 Pages

IDT

WAN PLL WITH DUAL REFERENCE INPUTS

DESCRIPTION The IDT82V3002A is a WAN PLL with dual reference inputs. It contains a Digital Phase-Locked Loop (DPLL), which generates ST-BUS clocks and framing signals that are phase locked to a 2.048 MHz, 1.544 MHz or 8 kHz input reference. FEATURES • Supports AT&T TR62411 and Telcordia GR-

文件：390.86 Kbytes 页数：28 Pages

IDT

WAN PLL WITH DUAL REFERENCE INPUTS

文件：1.30694 Mbytes 页数：29 Pages

IDT