3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O

文件：68.06 Kbytes 页数：6 Pages

IDT

3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O

文件：68.06 Kbytes 页数：6 Pages

IDT

3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O

文件：68.06 Kbytes 页数：6 Pages

IDT

Octal D-type Transparent Latches with 3-state Outputs

Description The RD74LVC573B has eight D type latches with three state outputs in a 20-pin package. When the latch enable input is high, the Q outputs will follow the D inputs. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high ag

文件：106.53 Kbytes 页数：12 Pages

RENESAS

瑞萨