HIGH-PERFORMANCE CMOS BUS INTERFACE REGISTERS

DESCRIPTION: The FCT82xT series is built using an advanced dual metal CMOS technology. The FCT82xT series bus interface registers are designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider address/data paths or buses carrying parity.

文件：178.5 Kbytes 页数：9 Pages

IDT

HIGH-PERFORMANCE CMOS BUS INTERFACE REGISTERS

DESCRIPTION: The FCT82xT series is built using an advanced dual metal CMOS technology. The FCT82xT series bus interface registers are designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider address/data paths or buses carrying parity.

文件：178.5 Kbytes 页数：9 Pages

IDT

HIGH-PERFORMANCE CMOS BUS INTERFACE REGISTERS

DESCRIPTION: The FCT82xT series is built using an advanced dual metal CMOS technology. The FCT82xT series bus interface registers are designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider address/data paths or buses carrying parity.

文件：178.5 Kbytes 页数：9 Pages

IDT

HIGH-PERFORMANCE CMOS BUS INTERFACE REGISTERS

DESCRIPTION: The FCT82xT series is built using an advanced dual metal CMOS technology. The FCT82xT series bus interface registers are designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider address/data paths or buses carrying parity.

文件：178.5 Kbytes 页数：9 Pages

IDT

HIGH-PERFORMANCE CMOS BUS INTERFACE REGISTERS

DESCRIPTION: The FCT82xT series is built using an advanced dual metal CMOS technology. The FCT82xT series bus interface registers are designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider address/data paths or buses carrying parity.

文件：178.5 Kbytes 页数：9 Pages

IDT

HIGH-PERFORMANCE CMOS BUS INTERFACE REGISTERS

DESCRIPTION: The FCT82xT series is built using an advanced dual metal CMOS technology. The FCT82xT series bus interface registers are designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider address/data paths or buses carrying parity.

文件：178.5 Kbytes 页数：9 Pages

IDT