IDT74FCT388915T70PY中文资料IDT规格书PDF资料数据手册-114ic电子网

IDT74FCT388915T70PY中文资料PDF规格书

厂商型号	IDT74FCT388915T70PY
功能描述	3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH (3-STATE)
文件大小	145.69 Kbytes
页面数量	11 页
生产厂商	Integrated Device Technology, Inc.
企业简称	IDT【集成器】
中文名称	深圳市集成器件技术有限公司官网
原厂标识
数据手册	下载地址一下载地址二
更新时间	2024-6-19 15:02:00

DESCRIPTION:

The IDT54/74FCT388915T uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock.

FEATURES:

• 0.5 MICRON CMOS Technology

• Input frequency range: 10MHz – f2Q Max. spec

(FREQ_SEL = HIGH)

• Max. output frequency: 150MHz

• Pin and function compatible with FCT88915T, MC88915T

• 5 non-inverting outputs, one inverting output, one 2x

output, one ÷2 output; all outputs are TTL-compatible

• 3-State outputs

• Output skew < 350ps (max.)

• Duty cycle distortion < 500ps (max.)

• Part-to-part skew: 1ns (from tPD max. spec)

• 32/–16mA drive at CMOS output voltage levels

• VCC = 3.3V ± 0.3V

• Inputs can be driven by 3.3V or 5V components

• Available in 28 pin PLCC, LCC and SSOP packages