3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER

DESCRIPTION: The FCT3932 uses phase-lock loop technology to lock the frequency and phase of the feedback to the input reference clock. It provides a large number of low skew outputs that are configurable in 16 different modes using the CNTRL 1-4 inputs. FEATURES: • 0.5 MICRON CMOS Technology •

文件：131.26 Kbytes 页数：9 Pages

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER

DESCRIPTION: The FCT3932 uses phase-lock loop technology to lock the frequency and phase of the feedback to the input reference clock. It provides a large number of low skew outputs that are configurable in 16 different modes using the CNTRL 1-4 inputs. FEATURES: • 0.5 MICRON CMOS Technology •

文件：131.26 Kbytes 页数：9 Pages

IDT

3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER

DESCRIPTION: The FCT3932 uses phase-lock loop technology to lock the frequency and phase of the feedback to the input reference clock. It provides a large number of low skew outputs that are configurable in 16 different modes using the CNTRL 1-4 inputs. FEATURES: • 0.5 MICRON CMOS Technology •

文件：131.26 Kbytes 页数：9 Pages

IDT

BROADCOM
BGA-304

BROADCOM

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IDT
BGA

IDT

上传：深圳市瑞盛伟业电子有限公司