3.3 VOLT CMOS SyncFIFO 64 x 36

DESCRIPTION: The IDT72V3611 is a pin and functionally compatible version of the IDT723611, designed to run off a 3.3V supply for exceptionally low power consumption. This device is a monolithic, high-speed, low-power, CMOS Synchronous (clocked) FIFO memory which supports clock frequencies up to 6

文件：200.75 Kbytes 页数：20 Pages

IDT

3.3 VOLT CMOS SyncFIFO

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瑞萨

3.3 VOLT HIGH-DENSITY SUPERSYNC II

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

文件：310.35 Kbytes 页数：48 Pages

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II??36-BIT FIFO

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

文件：470.5 Kbytes 页数：48 Pages

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC??II 36-BIT FIFO

DESCRIPTION: The IDT72V3640/72V3650/72V3660/72V3670/72V3680/72V3690 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x

文件：567.57 Kbytes 页数：36 Pages

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II??36-BIT FIFO

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

文件：470.5 Kbytes 页数：48 Pages

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II??36-BIT FIFO

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

文件：470.5 Kbytes 页数：48 Pages

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC??II 36-BIT FIFO

DESCRIPTION: The IDT72V3640/72V3650/72V3660/72V3670/72V3680/72V3690 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x

文件：567.57 Kbytes 页数：36 Pages

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II??36-BIT FIFO

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

文件：470.5 Kbytes 页数：48 Pages

IDT

3.3 VOLT HIGH-DENSITY SUPERSYNC II??36-BIT FIFO

DESCRIPTION: The IDT72V36100/72V36110 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read an

文件：470.5 Kbytes 页数：48 Pages

IDT