3.3 VOLT CMOS SyncFIFO™

FEATURES: • 256 x 9-bit organization IDT72V201 • 512 x 9-bit organization IDT72V211 • 1,024 x 9-bit organization IDT72V221 • 2,048 x 9-bit organization IDT72V231 • 4,096 x 9-bit organization IDT72V241 • 8,192 x 9-bit organization IDT72V251 • 10 ns read/write cycle time • 5V input tolerant

文件：349.21 Kbytes 页数：15 Pages

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3.3 VOLT CMOS SyncFIFO

文件：285.18 Kbytes 页数：14 Pages

IDT

3.3 VOLT CMOS SyncFIFO??256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9

文件：115.41 Kbytes 页数：14 Pages

IDT

3.3 VOLT HIGH DENSITY CMOS SUPERSYNC FIFO™ 262,144 x 9 524,288 x 9

FEATURES: • Choose among the following memory organizations: IDT72V2101 ⎯ 262,144 x 9 IDT72V2111 ⎯ 524,288 x 9 • Pin-compatible with the IDT72V261/72V271 and the IDT72V281/ 72V291 SuperSync FIFOs • 10ns read/write cycle time (6.5ns access time) • Fixed, low first word data latency time • 5

文件：388.94 Kbytes 页数：28 Pages

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3.3 VOLT HIGH-DENSITY SUPERSYNC II™ NARROW BUS FIFO 131,072 x 18/262,144 x 9 262,144 x 18/524,288 x 9

FEATURES: • Choose among the following memory organizations: IDT72V2103 ⎯ 131,072 x 18/262,144 x 9 IDT72V2113 ⎯ 262,144 x 18/524,288 x 9 • Functionally compatible with the IDT72V255LA/72V265LA and IDT72V275/72V285 SuperSync FIFOs • Up to 166 MHz Operation of the Clocks • User selectable Asy

文件：496.57 Kbytes 页数：47 Pages

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瑞萨

3.3 VOLT HIGH DENSITY CMOS SUPERSYNC FIFO

文件：434.6 Kbytes 页数：27 Pages

IDT

3.3 VOLT HIGH DENSITY CMOS SUPERSYNC FIFO

文件：242.42 Kbytes 页数：27 Pages

IDT

3.3 VOLT HIGH DENSITY CMOS SUPERSYNC FIFO

文件：242.42 Kbytes 页数：27 Pages

IDT

3.3 VOLT HIGH DENSITY CMOS SUPERSYNC FIFO

文件：242.42 Kbytes 页数：27 Pages

IDT

3.3 VOLT HIGH DENSITY CMOS SUPERSYNC FIFO

文件：242.42 Kbytes 页数：27 Pages

IDT