2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 72-BIT CONFIGURATIONS

DESCRIPTION: The IDT72T7285/72T7295/72T72105/72T72115 are exceptionally deep, extremely high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x72/x36/x18 data flow. These FIFOs offer several key user benefits: • Flexible x72/x36/x18

文件：542.41 Kbytes 页数：53 Pages

IDT

2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 72-BIT CONFIGURATIONS

DESCRIPTION: The IDT72T7285/72T7295/72T72105/72T72115 are exceptionally deep, extremely high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x72/x36/x18 data flow. These FIFOs offer several key user benefits: • Flexible x72/x36/x18

文件：358.94 Kbytes 页数：54 Pages

IDT

2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 72-BIT CONFIGURATIONS

FEATURES: • Choose among the following memory organizations: IDT72T7285 ⎯ 16,384 x 72 IDT72T7295 ⎯ 32,768 x 72 IDT72T72105 ⎯ 65,536 x 72 IDT72T72115 ⎯ 131,072 x 72 • Up to 225 MHz Operation of Clocks • User selectable HSTL/LVTTL Input and/or Output • Read Enable & Read Clock Echo outputs a

文件：560.06 Kbytes 页数：55 Pages

RENESAS

瑞萨

2.5 VOLT HIGH-SPEED TeraSync FIFO 72-BIT CONFIGURATIONS

文件：465.79 Kbytes 页数：53 Pages

IDT

2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 72-BIT CONFIGURATIONS

DESCRIPTION: The IDT72T7285/72T7295/72T72105/72T72115 are exceptionally deep, extremely high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x72/x36/x18 data flow. These FIFOs offer several key user benefits: • Flexible x72/x36/x18

文件：542.41 Kbytes 页数：53 Pages

IDT

2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 72-BIT CONFIGURATIONS

FEATURES: • Choose among the following memory organizations: IDT72T7285 ⎯ 16,384 x 72 IDT72T7295 ⎯ 32,768 x 72 IDT72T72105 ⎯ 65,536 x 72 IDT72T72115 ⎯ 131,072 x 72 • Up to 225 MHz Operation of Clocks • User selectable HSTL/LVTTL Input and/or Output • Read Enable & Read Clock Echo outputs a

文件：560.06 Kbytes 页数：55 Pages

RENESAS

瑞萨

2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 72-BIT CONFIGURATIONS

FEATURES: • Choose among the following memory organizations: IDT72T7285 ⎯ 16,384 x 72 IDT72T7295 ⎯ 32,768 x 72 IDT72T72105 ⎯ 65,536 x 72 IDT72T72115 ⎯ 131,072 x 72 • Up to 225 MHz Operation of Clocks • User selectable HSTL/LVTTL Input and/or Output • Read Enable & Read Clock Echo outputs a

文件：560.06 Kbytes 页数：55 Pages

RENESAS

瑞萨

2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 72-BIT CONFIGURATIONS

DESCRIPTION: The IDT72T7285/72T7295/72T72105/72T72115 are exceptionally deep, extremely high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x72/x36/x18 data flow. These FIFOs offer several key user benefits: • Flexible x72/x36/x18

文件：542.41 Kbytes 页数：53 Pages

IDT

2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 72-BIT CONFIGURATIONS

FEATURES: • Choose among the following memory organizations: IDT72T7285 ⎯ 16,384 x 72 IDT72T7295 ⎯ 32,768 x 72 IDT72T72105 ⎯ 65,536 x 72 IDT72T72115 ⎯ 131,072 x 72 • Up to 225 MHz Operation of Clocks • User selectable HSTL/LVTTL Input and/or Output • Read Enable & Read Clock Echo outputs a

文件：560.06 Kbytes 页数：55 Pages

RENESAS

瑞萨

2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 72-BIT CONFIGURATIONS

FEATURES: • Choose among the following memory organizations: IDT72T7285 ⎯ 16,384 x 72 IDT72T7295 ⎯ 32,768 x 72 IDT72T72105 ⎯ 65,536 x 72 IDT72T72115 ⎯ 131,072 x 72 • Up to 225 MHz Operation of Clocks • User selectable HSTL/LVTTL Input and/or Output • Read Enable & Read Clock Echo outputs a

文件：560.06 Kbytes 页数：55 Pages

RENESAS

瑞萨