CMOS SuperSync FIFO™ 8,192 x 18 16,384 x 18

FEATURES • Choose among the following memory organizations: IDT72255LA — 8,192 x 18 IDT72265LA — 16,384 x 18 • Pin-compatible with the IDT72275/72285 SuperSync FIFOs • 10ns read/write cycle time (8ns access time) • Fixed, low first word data latency time • Auto power down minimizes standby

文件：404.22 Kbytes 页数：28 Pages

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CMOS SUPERSYNC FIFO

DESCRIPTION: The IDT72255LA/72265LA are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls. These FIFOs offer numerous improvements over previous SuperSync FIFOs, including the following: • The limitation of the frequency of one clock inp

文件：354.37 Kbytes 页数：27 Pages

IDT

CMOS SUPERSYNC FIFO

DESCRIPTION: The IDT72255LA/72265LA are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls. These FIFOs offer numerous improvements over previous SuperSync FIFOs, including the following: • The limitation of the frequency of one clock inp

文件：354.37 Kbytes 页数：27 Pages

IDT

CMOS SUPERSYNC FIFO

DESCRIPTION: The IDT72255LA/72265LA are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls. These FIFOs offer numerous improvements over previous SuperSync FIFOs, including the following: • The limitation of the frequency of one clock inp

文件：354.37 Kbytes 页数：27 Pages

IDT

CMOS SUPERSYNC FIFO

DESCRIPTION: The IDT72255LA/72265LA are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls. These FIFOs offer numerous improvements over previous SuperSync FIFOs, including the following: • The limitation of the frequency of one clock inp

文件：354.37 Kbytes 页数：27 Pages

IDT

CMOS SUPERSYNC FIFO

DESCRIPTION: The IDT72255LA/72265LA are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls. These FIFOs offer numerous improvements over previous SuperSync FIFOs, including the following: • The limitation of the frequency of one clock inp

文件：354.37 Kbytes 页数：27 Pages

IDT

CMOS SUPERSYNC FIFO

DESCRIPTION: The IDT72255LA/72265LA are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls. These FIFOs offer numerous improvements over previous SuperSync FIFOs, including the following: • The limitation of the frequency of one clock inp

文件：354.37 Kbytes 页数：27 Pages

IDT

CMOS SUPERSYNC FIFO

DESCRIPTION: The IDT72255LA/72265LA are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls. These FIFOs offer numerous improvements over previous SuperSync FIFOs, including the following: • The limitation of the frequency of one clock inp

文件：354.37 Kbytes 页数：27 Pages

IDT

CMOS SUPERSYNC FIFO

DESCRIPTION: The IDT72255LA/72265LA are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls. These FIFOs offer numerous improvements over previous SuperSync FIFOs, including the following: • The limitation of the frequency of one clock inp

文件：354.37 Kbytes 页数：27 Pages

IDT

CMOS SUPERSYNC FIFO

DESCRIPTION: The IDT72255LA/72265LA are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls. These FIFOs offer numerous improvements over previous SuperSync FIFOs, including the following: • The limitation of the frequency of one clock inp

文件：354.37 Kbytes 页数：27 Pages

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