IDT54FCT138ATD数据手册Renesas中文资料规格书

描述 Description

DESCRIPTION:
The IDT54/74FCT138T is a 1-of-8 decoder built using an advanced dual metal CMOS technology. The IDT54/74FCT138T accepts three binary weighted inputs (A0, A1, A2) and, when enabled, provides eight
mutually exclusive active low outputs (O0- O7). The IDT54/74FCT138T features three enable inputs, two active low (E1, E2) and one active high (E3). All outputs will be high unless E1and E2are low and E3is high. This multiple enable function allows easy parallel expansion of the device to a 1-of-32 (5 lines to 32 lines) decoder with just four IDT54/74FCT138T devices and one inverter.FEATURES:
• Std., A, and C grades
• Low input and output leakage ≤1µA (max.)
• CMOS power levels
• True TTL input and output compatibility:
  –VOH= 3.3V (typ.)
  –VOL= 0.3V (typ.)
• High Drive outputs (-15mA IOH, 48mA IOL)
• Meets or exceeds JEDEC standard 18 specifications
• Military product compliant to MIL-STD-883, Class B and DESC listed (dual marked)
• Power off disable outputs permit \"live insertion\"
• Available in the following packages:
  – Industrial: SOIC, QSOP
  – Military: CERDIP, LCC