3.3V ZERO DELAY CLOCK BUFFER

FEATURES: • Phase-Lock Loop Clock Distribution • 10MHz to 133MHz operating frequency • Distributes one clock input to one bank of five and one bank of four outputs • Separate output enable for each output bank • Output Skew

文件：299.11 Kbytes 页数：11 Pages

RENESAS

瑞萨

3.3V ZERO DELAY CLOCK BUFFER

DESCRIPTION: The IDT2309B is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. FEATURES: •

文件：273.35 Kbytes 页数：10 Pages

IDT

3.3V ZERO DELAY CLOCK BUFFER

DESCRIPTION: The IDT2309B is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. FEATURES: •

文件：273.35 Kbytes 页数：10 Pages

IDT

3.3V ZERO DELAY CLOCK BUFFER

FEATURES: • Phase-Lock Loop Clock Distribution • 10MHz to 133MHz operating frequency • Distributes one clock input to one bank of five and one bank of four outputs • Separate output enable for each output bank • Output Skew

文件：299.11 Kbytes 页数：11 Pages

RENESAS

瑞萨

Package：16-TSSOP（0.173"，4.40mm 宽）；包装：托盘 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC CLK BUFFER HIGH DRIVE 16TSSOP

Renesas Electronics America Inc

Package：16-TSSOP（0.173"，4.40mm 宽）；包装：托盘 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC CLK BUFFER HIGH DRIVE 16TSSOP

Renesas Electronics America Inc

Package：16-TSSOP（0.173"，4.40mm 宽）；包装：管件 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC CLK BUFFER ZD HI DRV 16-TSSOP

Renesas Electronics America Inc