ICS952702YFLFT中文资料瑞萨数据手册PDF规格书

Output Features:

• 1 - Pair of differential open drain CPU outputs

• 1 - Single-ended open drain CPU output

• 8 - PCICLK @ 3.3V including 2 PCI clock free running

• 2 - AGPCLK @ 3.3V

• 3 - REF @ 3.3V

• 2 - ZCLK @ 3.3V

• 2 - IOAPIC @ 2.5V

• 1 - 12_48MHz @ 3.3V

• 1 - 24_48MHz @ 3.3V

Key Specifications:

• CPU Output Jitter <250ps

• AGP Output Jitter <250ps

• ZCLK Output Jitter <250ps

• PCI Output Jitter <500ps

• CPU-AGP/PCI/ZCLK skew: 2.5ns~3.5ns