High Performance Communication Buffer

General Description The ICS91305I is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in communication systems operating at

文件：124.96 Kbytes 页数：8 Pages

ICSI

High Performance Communication Buffer

General Description The ICS91305 is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in communication systems operating at s

文件：86.61 Kbytes 页数：8 Pages

ICST

32-bit Microcontroller

文件：880.72 Kbytes 页数：90 Pages

Fujitsu

富士通

32-bit Microcontroller

文件：880.72 Kbytes 页数：90 Pages

Fujitsu

富士通