丝印：ICS85304A01L；Package：TSSOP；Low Skew, 1-to-5 , Different ial-to-3 .3V LVPECL Fanout Buffer

General Description The 85304-01 is a low skew, high performance 1-to-5 Differential-to-3.3V LVPECL fanout buffer. The 85304-01 has two selectable clock inputs. The CLKx, nCLKx pairs can accept most standard differential input levels. The clock enable is internally synchronized to eliminate runt

文件：302.48 Kbytes 页数：15 Pages

IDT

丝印：ICS85304A01L；Package：TSSOP；Low Skew, 1-to-5, Differential-to-3.3V LVPECL Fanout Buffer

Features • Five 3.3V differential LVPECL output pairs • Selectable differential CLKx, nCLKx input pairs • CLKx, nCLKx input pairs can accept the following differential levels: LVDS, LVPECL, LVHSTL, SSTL and HCSL levels • Maximum output frequency: 650MHz • Translates any single-ended input si

文件：593.29 Kbytes 页数：16 Pages

RENESAS

瑞萨

丝印：ICS85304A01L；Package：TSSOP；Low Skew, 1-to-5, Differential-to-3.3V LVPECL Fanout Buffer

Features • Five 3.3V differential LVPECL output pairs • Selectable differential CLKx, nCLKx input pairs • CLKx, nCLKx input pairs can accept the following differential levels: LVDS, LVPECL, LVHSTL, SSTL and HCSL levels • Maximum output frequency: 650MHz • Translates any single-ended input si

文件：593.29 Kbytes 页数：16 Pages

RENESAS

瑞萨

丝印：ICS85304A01L；Package：TSSOP；Low Skew, 1-to-5 , Different ial-to-3 .3V LVPECL Fanout Buffer

General Description The 85304-01 is a low skew, high performance 1-to-5 Differential-to-3.3V LVPECL fanout buffer. The 85304-01 has two selectable clock inputs. The CLKx, nCLKx pairs can accept most standard differential input levels. The clock enable is internally synchronized to eliminate runt

文件：302.48 Kbytes 页数：15 Pages

IDT