Low Skew, 1-to-16 Differential-to- LVDS, Clock Distribution Chip

FEATURES • Sixteen Differential LVDS outputs • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • Maximum output frequency: 700MHz • Translates any differential input signal (LVPECL, LVHSTL, SSTL, DCM) to LVDS levels without external bias ne

文件：599.05 Kbytes 页数：19 Pages

RENESAS

瑞萨

LOW SKEW, 1-TO-16 DIFFERENTIAL-TO-LVDS CLOCK DISTRIBUTION CHIP

GENERALDESCRIPTION The ICS8516I is a low skew, high performance 1-to-16 Differential-to-LVDS Clock Distribution Chip and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS8516I CLK, nCLK pair can accept any differential input levels and translates them to

文件：170.41 Kbytes 页数：13 Pages

ICST

Low Skew, 1-to-16 Differential-to-LVDS, Clock Distribution Chip

文件：181.32 Kbytes 页数：18 Pages

IDT

FM IF RECEIVER FOR FLEX PAGER

文件：150.68 Kbytes 页数：6 Pages

Samsung

三星

1.425V to 3.6V Input, 1A, 0.2V Dropout LDO Regulators

General Description The MAX8516/MAX8517/MAX8518 low-dropout linear regulators operate from input voltages as low as 1.425V and are able to deliver up to 1A of continuous output current with a maximum dropout voltage of only 200mV. The output voltage can be set from 0.5V to (VIN - 0.2V) and is 1

文件：181.75 Kbytes 页数：9 Pages

Maxim

美信

1.425V to 3.6V Input, 1A, 0.2V Dropout LDO Regulators

文件：190.24 Kbytes 页数：10 Pages

Maxim

美信