LVCMOS interface levels for all control inputs

文件：647.87 Kbytes 页数：24 Pages

IDT

Differential Clock/Data Multiplexer

General Description The 831724 is a high-performance, differential HCSL clock/data multiplexer and fanout buffer. The device is designed for the multiplexing and fanout of high-frequency clock and data signals. The device has two differential, selectable clock/data inputs. The selected input

文件：693.69 Kbytes 页数：23 Pages

RENESAS

瑞萨

Differential Clock/Data Multiplexer

文件：496.48 Kbytes 页数：22 Pages

IDT

Differential Clock/Data Multiplexer

文件：496.48 Kbytes 页数：22 Pages

IDT