丝印：ICS714004DIL；Package：VFQFN；FemtoClock® Zero Delay Buffer/ Clock Generator for PCI Express™ and Ethernet

Features • Four 0.7V differential HCSL output pairs, individually selectable for 100MHz or 125MHz for PCIe and Ethernet applications • One differential clock input pair CLK, nCLK can accept the following differential input levels: LVPECL, LVDS, M-LVDS, LVHSTL, HCSL • One M-LVDS I/O pair (MLV

文件：644.83 Kbytes 页数：32 Pages

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瑞萨

丝印：ICS714004DIL；Package：VFQFN；FemtoClock® Zero Delay Buffer/ Clock Generator for PCI Express™ and Ethernet

Features • Four 0.7V differential HCSL output pairs, individually selectable for 100MHz or 125MHz for PCIe and Ethernet applications • One differential clock input pair CLK, nCLK can accept the following differential input levels: LVPECL, LVDS, M-LVDS, LVHSTL, HCSL • One M-LVDS I/O pair (MLV

文件：644.83 Kbytes 页数：32 Pages

RENESAS

瑞萨