LOW PHASE NOISE, ZERO DELAY BUFFER AND MULTIPLIER

Description The ICS670-04 is a high speed, low phase noise, Zero Delay Buffer (ZDB) which integrates ICS’ proprietary analog/digital Phase Locked Loop (PLL) techniques. It is identical to the ICS670-02, but with an increased maximum output frequency of 210 MHz. Part of ICS’ ClockBlocksTM family,

文件：176.61 Kbytes 页数：6 Pages

ICST

LOW PHASE NOISE, ZERO DELAY BUFFER AND MULTIPLIER

Description The ICS670-04 is a high speed, low phase noise, Zero Delay Buffer (ZDB) which integrates ICS’ proprietary analog/digital Phase Locked Loop (PLL) techniques. It is identical to the ICS670-02, but with an increased maximum output frequency of 210 MHz. Part of ICS’ ClockBlocksTM family,

文件：176.61 Kbytes 页数：6 Pages

ICST

LOW PHASE NOISE, ZERO DELAY BUFFER AND MULTIPLIER

Description The ICS670-04 is a high speed, low phase noise, Zero Delay Buffer (ZDB) which integrates ICS’ proprietary analog/digital Phase Locked Loop (PLL) techniques. It is identical to the ICS670-02, but with an increased maximum output frequency of 210 MHz. Part of ICS’ ClockBlocksTM family,

文件：176.61 Kbytes 页数：6 Pages

ICST

LOW PHASE NOISE ZERO DELAY BUFFER AND MULTIPLIER

Features • Packaged in 16-pin SOIC – Pb (lead) free • Clock inputs from 5 to 210 MHz (see page 2) • Patented PLL with low phase noise • Output clocks up to 210 MHz at 3.3 V • 15 selectable on-chip multipliers • Power down mode available • Low phase noise: -111 dBc/Hz at 10 kHz • Output ena

文件：353.59 Kbytes 页数：8 Pages

RENESAS

瑞萨

LOW PHASE NOISE ZERO DELAY BUFFER AND MULTIPLIER

Features • Packaged in 16-pin SOIC – Pb (lead) free • Clock inputs from 5 to 210 MHz (see page 2) • Patented PLL with low phase noise • Output clocks up to 210 MHz at 3.3 V • 15 selectable on-chip multipliers • Power down mode available • Low phase noise: -111 dBc/Hz at 10 kHz • Output ena

文件：353.59 Kbytes 页数：8 Pages

RENESAS

瑞萨

LOW PHASE NOISE, ZERO DELAY BUFFER AND MULTIPLIER

Description The ICS670-04 is a high speed, low phase noise, Zero Delay Buffer (ZDB) which integrates ICS’ proprietary analog/digital Phase Locked Loop (PLL) techniques. It is identical to the ICS670-02, but with an increased maximum output frequency of 210 MHz. Part of ICS’ ClockBlocksTM family,

文件：176.61 Kbytes 页数：6 Pages

ICST