LOW PHASE NOISE, ZERO DELAY BUFFER AND MULTIPLIER

Description The ICS670-02 is a high speed, low phase noise, Zero Delay Buffer (ZDB) which integrates ICS’ proprietary analog/digital Phase Locked Loop (PLL) techniques. Part of ICS’ ClockBlocksTM family, the part’s zero delay feature means that the rising edge of the input clock aligns with the r

文件：175.82 Kbytes 页数：6 Pages

ICST

Package：16-SOIC（0.154"，3.90mm 宽）；包装：管件 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC BUFFER/MULTIPLIER ZD 16-SOIC

Renesas Electronics America Inc

LOW PHASE NOISE ZERO DELAY BUFFER AND MULTIPLIER

Features • Packaged in 16-pin SOIC • Pb (lead) free package, RoHS compliant • Clock inputs from 5 to 160 MHz (see page 2) • Patented PLL with low phase noise • Output clocks up to 160 MHz at 3.3 V • 15 selectable on-chip multipliers • Power down mode available • Low phase noise: -111 dBc/H

文件：342.69 Kbytes 页数：8 Pages

RENESAS

瑞萨

LOW PHASE NOISE ZERO DELAY BUFFER AND MULTIPLIER

Features • Packaged in 16-pin SOIC • Pb (lead) free package, RoHS compliant • Clock inputs from 5 to 160 MHz (see page 2) • Patented PLL with low phase noise • Output clocks up to 160 MHz at 3.3 V • 15 selectable on-chip multipliers • Power down mode available • Low phase noise: -111 dBc/H

文件：342.69 Kbytes 页数：8 Pages

RENESAS

瑞萨

LOW PHASE NOISE, ZERO DELAY BUFFER AND MULTIPLIER

Description The ICS670-02 is a high speed, low phase noise, Zero Delay Buffer (ZDB) which integrates ICS’ proprietary analog/digital Phase Locked Loop (PLL) techniques. Part of ICS’ ClockBlocksTM family, the part’s zero delay feature means that the rising edge of the input clock aligns with the r

文件：175.82 Kbytes 页数：6 Pages

ICST