LOW PHASE NOISE ZERO DELAY BUFFER AND MULTIPLIER

Features • Packaged in 16-pin SOIC • Pb (lead) free package, RoHS compliant • Clock inputs from 5 to 210 MHz (see page 2) • Patented PLL with low phase noise • Output clocks up to 210 MHz at 3.3V • 15 selectable on-chip multipliers • Power down mode available • Low phase noise: -124 dBc/Hz

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LOW PHASE NOISE, ZERO DELAY BUFFER AND MULTIPLIER

Description The ICS670-03 is a high speed, low phase noise, Zero Delay Buffer (ZDB) which integrates ICS’ proprietary analog/digital Phase Locked Loop (PLL) techniques. It is identical to the ICS670-01, but with an increased maximum output frequency of 210 MHz. Part of ICS’ ClockBlocksTM family,

文件：178.83 Kbytes 页数：6 Pages

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Packaged in 16-pin SOIC

文件：202.21 Kbytes 页数：7 Pages

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LOW PHASE NOISE, ZERO DELAY BUFFER AND MULTIPLIER

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