LOW PHASE NOISE ZERO DELAY BUFFER AND MULTIPLIER

Features • Packaged in 16-pin SOIC • Pb (lead) free package, RoHS compliant • Clock inputs from 5 to 160 MHz (see page 2) • Patented PLL with low phase noise • Output clocks up to 160 MHz at 3.3 V • 15 selectable on-chip multipliers • Power down mode available • Low phase noise: -124 dBc/H

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Low Phase Noise Zero Delay Buffer and Multiplier

Description The ICS670-01 is a high speed, low phase noise Zero Delay Buffer (ZDB) which integrates ICS’ proprietary analog/digital Phase Locked Loop (PLL) techniques. Part of ICS’ ClockBlocks™ family, the zero delay feature means that the rising edge of the input clock aligns with the risin

文件：84.21 Kbytes 页数：5 Pages

ICST

LOW PHASE NOISE ZERO DELAY BUFFER AND MULTIPLIER

文件：203.22 Kbytes 页数：7 Pages

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Packaged in 16-pin SOIC

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IDT

Low Phase Noise Zero Delay Buffer and Multiplier

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