ICS552G-03T中文资料ICST数据手册PDF规格书

描述 Description

The ICS552-03 is a low skew, single input to eight output clock buffer. Four of the outputs are exact copies of the input, while the other four are divide by 2 copies of the input. It is part of ICS’ Clock Blocks™ family. See the ICS553 for a 1 to 4 low skew buffer, or the ICS552-02 for a 1 to 8 low skew buffer without divide by 2. For more than 8 outputs see the MK74CBxxx Buffalo™ series of clock drivers. ICS makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs.

特性 Features

• Low skew outputs (50 ps maximum)

• Packaged in 16 pin TSSOP

• Low power CMOS technology

• Operating Voltages of 2.5 V to 5 V

• Output Enable pin tri-states outputs

• Low skew between 1X and 1/2X outputs (100 ps maximum)

• One bank of 4 outputs at 1X

• One bank of 4 outputs at 1/2X

• 5V tolerant input clocks

• Input clock multiplexer