LOCO PLL CLOCK MULTIPLIER

Description The ICS501 LOCOTM is the most cost effective way to generate a high-quality, high-frequency clock output from a lower frequency crystal or clock input. The name LOCO stands for Low Cost Oscillator, as it is designed to replace crystal oscillators in most electronic systems. Using Ph

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ICST

LOCO™ PLL CLOCK MULTIPLIER

Description\nThe ICS501 LOCOTM is the most cost effective way to generate a high-quality, high-frequency clock output from a lower frequency crystal or clock input. The name LOCO stands for Low Cost Oscillator, as it is designed to replace crystal oscillators in most electronic systems. Using\nPhase • Packaged as 8-pin SOIC, MSOP, or die\n• Available in RoHS 5 (green) or RoHS 6 (green and lead free) compliant packaging\n• IDT’s lowest cost PLL clock\n• Zero ppm multiplication error\n• Input crystal frequency of 5 - 27 MHz\n• Input clock frequency of 2 - 50 MHz\n• Output clock frequencies up to ;

Renesas

瑞萨

Package：8-SOIC（0.154"，3.90mm 宽）；包装：管件 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC PLL CLK MULTIPLIER 8-SOIC

RENESAS

瑞萨

NPN general purpose transistor

DESCRIPTION NPN transistor in a TO-92; SOT54 plastic package. PNP complement: JA101. FEATURES • Low current (max. 100 mA) • Low voltage (max. 45 V). APPLICATIONS • General purpose switching and amplification.

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PHI

PHI

Silicon MOS IC

文件：38.69 Kbytes 页数：3 Pages

PANASONIC

松下

Programmable macro logic PML

DESCRIPTION The PLHS501 is a high-density Bipolar Programmable Macro Logic device. PML incorporates a programmable NAND structure. The NAND architecture is an efficient method for implementing any logic function. The SNAP software development system provides a user friendly environment for design

文件：84.76 Kbytes 页数：12 Pages

PHI

PHI