IC61LV25616-10T中文资料ICSI数据手册PDF规格书

DESCRIPTION

The ICSI IC61LV25616 is a high-speed, 4,194,304-bit static RAM organized as 262,144 words by 16 bits. It is fabricated using ICSIs high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power consump tion devices.

When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels.

Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access.

The IC61LV25616 is packaged in the JEDEC standard 44-pin 400mil SOJ, 44 pin 400mil TSOP-2 and 48-pin 6*8 TF BGA.

FEATURES

• High-speed access time: 8, 10, 12, and 15 ns

• CMOS low power operation

• TTL compatible interface levels

• Single 3.3V ± 10 power supply

• Fully static operation: no clock or refresh required

• Three state outputs

• Data control for upper and lower bytes

• Industrial temperature available