8-bit bidirectional universal shift register

DESCRIPTION The 74F166 is a high speed 8–bit shift register that has fully synchronous serial parallel data entry selected by an active low parallel enable (PE) input. When the PE is low one setup time before the low–to–high clock transition, parallel data is entered into the register. FEA

文件：94.75 Kbytes 页数：12 Pages

PHI

飞利浦

8-bit bidirectional universal shift register

恩XP

恩智浦

8-bit bidirectional universal shift register

DESCRIPTION The 74F166 is a high speed 8–bit shift register that has fully synchronous serial parallel data entry selected by an active low parallel enable (PE) input. When the PE is low one setup time before the low–to–high clock transition, parallel data is entered into the register. FEA

文件：94.75 Kbytes 页数：12 Pages

PHI

飞利浦

8-bit bidirectional universal shift register

DESCRIPTION The 74F166 is a high speed 8–bit shift register that has fully synchronous serial parallel data entry selected by an active low parallel enable (PE) input. When the PE is low one setup time before the low–to–high clock transition, parallel data is entered into the register. FEA

文件：94.75 Kbytes 页数：12 Pages

PHI

飞利浦

8-bit bidirectional universal shift register

DESCRIPTION The 74F166 is a high speed 8–bit shift register that has fully synchronous serial parallel data entry selected by an active low parallel enable (PE) input. When the PE is low one setup time before the low–to–high clock transition, parallel data is entered into the register. FEA

文件：94.75 Kbytes 页数：12 Pages

PHI

飞利浦